Super low profile package with high efficiency of heat dissipation

ABSTRACT

A super low profile package with high efficiency of heat dissipation comprises the substrate, the heat sink, the die, the wires and the plastic mold. The heat sink adheres to the ground ring by the extending part of the heat sink, and the first surface of the die adheres to the heat sink. In addition, the die is connected to the substrate by the wires, and the plastic mold encapsulates the die, the heat sink and the wires. The chip package according to the invention possesses the small size and high efficiency of heat dissipation; besides, it also decreases the production cost for eliminating the conventional procedures of taping and de-taping.

[0001] This application incorporates by reference Taiwanese applicationSerial No. 89125656, Filed Dec. 1, 2000.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The invention relates in general to a chip package, and moreparticularly to a super low profile package with high efficiency of heatdissipation.

[0004] 2. Description of the Related Art

[0005] Recently, a trend of increasing the number of input/output (I/O)lead is thrived so that the size of chip package is increased aftermounting die in the packaging process; therefore, it is important tominimize the size of the package and the thickness of the plastic moldin order to reduce the overall size of the chip package.

[0006] A method for reducing the package size of a chip package inventedby Barry M. Miles and Glenn E. Gold is disclosed in U.S. Pat. No.5,696,666. Referring to FIG. 1A, which depicts an upward view of theconventional chip package 100, the chip package 100 includes thesubstrate 102 and die 104. The die 104 is seated in the cavity 106 thatis located in the center of the substrate 102, and a number of thesolder balls 109 are seated on the bottom side 110 of the substrate 102.

[0007] Referring to FIG. 1B, which depicts a cross sectional view of thechip package along the sectional line 1B-1B in FIG. 1A. In FIG. 1B, thedie 104 is wire bonded to the substrate 102 via the wires 112 and 114,and the plastic mold 116 is applied on the topside 118 of the substrate102; hence, the die 104 and the wire 112, 114 are encapsulated in theplastic mold 116. The topside 118 of the substrate 102 is the oppositeof the bottom side 110 of the substrate 102. H1 and H4 represent thethickness of the substrate 102 and the chip package 100, respectively.H2 represents the distance from the topside 117 of the plastic mold 116to the topside 118 of the substrate 102, which the minimal value isapproximately 0.2 mm. H3 represents the height of the solder ball 109,which the minimal value is approximately 0.3 mm. The thickness of thedie 104 is equal to, or thinner than, the substrate 102. H5 representsthe distance from the highest point of the wire 119 a/119 b to thetopside 118 of the substrate 102, and the minimal value is approximately0.15 mm that is smaller than H2. Therefore, the overall thickness H4 ofthe conventional chip package is equal to the sum of H1, H2 and H3,which the minimal overall thickness H4 is approximately 0.7 mm.

[0008]FIGS. 2A, 2B, 2C and 2D depict the process of making theconventional chip package illustrated in FIGS. 1A and 1B. Referring toFIG. 2A, the cavity 106 is formed in the substrate 102 a, and the tapthen is adhered on the bottom side 110 of the substrate 102 a to sealthe opening 133 below the cavity 106.

[0009] Referring to FIG. 2B, the die 104 is seated in the cavity 106 andheld with the tap 130, wherein the front surface 115 of the die 104 istoward to the same direction as the topside 118 of the substrate 102 a.The die 104 is then wire bonded using conventional techniques, and thedie 104 and the substrate 102 a is electrically connected by the wires112, 114 on the front side 115 of the die 104. Encapsulation issubsequently proceeding; the die 104 is filled with the plastic mold 116to a predetermined level. The plastic mold 116 that encapsulates the die104, wire 112 and wire 114 provides the strongly mechanical support forthe die 104 in order to stabilize the die 104 in the substrate 102 a.

[0010] After the die 104 is fixed to the substrate 102 a by the plasticmold 116, it does not need to keep the tap 130; therefore, de-taping isthen proceeding as shown in FIG. 2C, resulting in the bottom side 132 ofthe die 104 is exposed to the atmosphere.

[0011] Subsequently, solder ball placement is proceeding, which thenumerous solder balls 109 are seated on the bottom side 110 of thesubstrate 102 a as shown in FIG. 2D. After singulation, the conventionalchip package 100 is obtained as presented in FIG. 1B.

[0012] Referring to FIG. 3, which depicts a side view of the chippackage in FIG. 1B which have been connected to the printed circuitboard (PCB) 140. In FIG. 3, the chip package 100 is fixed to the PCB 140by connecting the solder ball 109 to the bonding pad 142, resulting inthe chip package 100 electrically connected to the PCB 140. The plasticmold 116, the wires 112 and 114 are seated on the topside 118 of thesubstrate 102 while the bottom side 132 of the die 104 is exposed to theatmosphere. However, the bottom side 132 of the die 104 is not connectedwith the surface 145 of the ground layer 144 by soldering so that heatgenerated by the die, which must typically be drawn from the chipthrough package interconnects, can not be efficiently dissipated to theoutside or the atmosphere by the ground layer 144 of PCB 140.

[0013] Moreover, the plastic mold 116, the wires 112, 114 are seated onthe topside 118 of the substrate 102, and the solder ball 109 are seatedon the bottom side 110 of the substrate 102; therefore, the overallthickness H4 of the conventional chip package 100 is larger than 0.5 mm.This obstacle cannot be surmounted by applying conventional process ofmaking the chip package. In addition, procedures of taping and de-tapingnot only make the process more complicated but also increase the cost.

SUMMARY OF THE INVENTION

[0014] It is therefore an object of the invention to provide a super lowprofile package with high efficiency of heat dissipation. The chippackage possesses the small size and high efficiency of heatdissipation. Besides, the elimination of conventional procedures ofTaping and De-taping decrease the production cost.

[0015] The invention achieves the above-identified objects by providinga super low profile package with high efficiency of heat dissipation.The chip package includes the substrate, the heat sink, the die, thewires and the plastic mold. The substrate has a cavity. A number of thesolder balls and a ground ring are seated in the bottom side of thesubstrate, and the extending part of the heat sink adheres to the groundring. The die is seated in the cavity, wherein the first surface of thedie adheres to the heat sink. In addition, the die is electricallyconnected to the substrate by the wires, wherein the wires are bonded onthe first surface of the die and the first surface of the substrate. Theplastic mold encapsulates the die, the heat sink and the wires.

[0016] The invention achieves the above-identified objects by providinga process of making a super low profile package with high efficiency ofheat dissipation. First, a substrate is provided while a ground ring isseated in the bottom side of the substrate, and a cavity is formed inthe substrate. Second, the extending part of the heat sink adheres tothe ground ring. Third, the die is seated in the cavity, and the frontsurface of the die adheres to the heat sink while parts of the frontside of the die for bonding the wires are exposed. Fourth, wire bondingis proceeding; two ends of the wire are separately bonded on the die andthe substrate. Then, encapsulation is proceeding, which the bottom sideof the die is filled with the plastic mold. The plastic moldencapsulates the die, the heat sink and the wires. Next, the solderballs are adhered on the bottom side of the substrate. Finally,singulation is proceeding.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Other objects, features, and advantages of the invention willbecome apparent from the following detailed description of the preferredbut non-limiting embodiments. The description is made with reference tothe accompanying drawings in which:

[0018]FIG. 1A (Prior Art) shows an upward view of the conventional chippackage;

[0019]FIG. 1B (Prior Art) shows a cross sectional view of the chippackage along the sectional line 1B-1B in FIG. 1A;

[0020] FIGS. 2A˜2D (Prior Art) show the process of making theconventional chip package illustrated in FIGS. 1A˜1B;

[0021]FIG. 3 (Prior Art) shows a side view of the chip package in FIG.1B which have been connected to the printed circuit board (PCB);

[0022]FIG. 4A show an upward view of the super low profile package withhigh efficiency of heat dissipation according to the invention;

[0023]FIG. 4B shows a cross sectional view of the super low profilepackage along the sectional line 4B-4B in FIG. 4A;

[0024]FIG. 5 shows an upward view of the chip package and the heat sinkaccording to the invention;

[0025] FIGS. 6A˜6D shows a cross sectional view of process of making thesuper low profile package along the sectional line 6A-6A in FIG. 5;

[0026]FIG. 7 shows a diagram of the super low profile package while thebottom side of the die is exposed to the atmosphere;

[0027]FIG. 8 shows a diagram of the super low profile package while theheat sink is not exposed to the atmosphere; and

[0028]FIG. 9 shows a side view of the super low profile package in FIG.4B connected to the printed circuit board (PCB).

DESCRIPTION OF THE PREFERRED EMBODIMENT

[0029] Referring to FIG. 4A, which depicts an upward view of the superlow profile package with high efficiency of heat dissipation accordingto the invention, while the plastic mold and the solder balls have notbeen placed in the chip package 200. In FIG. 4A, the chip package 200includes the substrate 202, the die 204 and the heat sink 206. The die204 is seated in the cavity 208 while the ground ring 210 is seated inthe bottom side 211 of the substrate 202, and the opening of the cavity208 is surrounded by the ground ring 210. The heat sink 206 includes thebody 215 and a number of the extending parts 212, and the extendingparts 212 adhere to the ground ring 210 by the Epoxy 213. However, theinvention is not limited herein, and the people skilled in the artshould know that the extending parts 212 could be fixed to the groundring 210 by other skills such as soldering and welding. Multiplesoldering points 209 are located around the ground ring 210, andmultiple wires 214 a connect the soldering point 209 and the solder ballsetting point 218. Moreover, multiple wires 214 b connect the die 204and the ground ring 210, wherein the heat sink 206 is used forsupporting the die 204. The objective of the invention enhancing theefficiency of heat dissipation for the chip package is achieved by theheat sink 206 exposed to the atmosphere. In addition, multiple traces219 connect the soldering point 209 and the solder ball setting point218, and the body 215 of the heat sink 206 is shaped for rectangular,for example.

[0030] Referring to FIG. 4B, which depicts a cross sectional view of thesuper low profile package along the sectional line 4B-4B in FIG. 4A,while the plastic mold 226 and the solder balls 224 have been formed inthe chip package 200. The heat sink 206 is set down the cavity 208, andfixed to the substrate 202 via the extending parts (not shown in FIG.4B). The die 204 is fixed to the bottom side 222 of the heat sink 206 bythe adhesive 221, and part of the front side 220 of the die 204 areexposed for bonding the wires 214 a and 214 b while the solder balls 224are seated in the bottom side 211 of the substrate 202. The height ofthe die 204 is smaller than the cavity 208, and the area of the heatsink 206 is smaller than the front side 220 of the die 204; therefore,the wire 214 a is able to connect the front side 220 of the die 204 andthe soldering point 209 of the substrate 202, and the wire 214 b isconnected to the ground ring 210. The cavity 208 is filled with theplastic mold 226, and the plastic mold 226 encapsulates the die 204, theheat sink 206 and the wires 214 a and 214 b, wherein the ground layer227 is formed above the topside 229 of the substrate 202. The groundlayer 227 is connected to the solder ball 224 by the via 225 in order toenhance the electric characteristics and decrease the signalinterference. The ground layer 227 is made of tinsel such as copper. Inthe preferred embodiment, the bottom side 231 of the die 204 is notexposed to the atmosphere.

[0031] The bottom side 211 of the substrate 202 is further including atrace layer 223, and the trace layer 223 includes the traces 219 (shownin FIG. 4A). The ground ring 210 is connected to the ground layer 227via the via 225. The ground layer 227 and the trace layer 223 is muchthinner than the substrate 202 so that the thickness of the ground layer227 and the trace layer 223 could be ignored; therefore, the sum ofthickness of the ground layer 227, trace layer 223 and the substrate 202is approximately equal to the substrate 202, which is represented as N1in the preferred embodiment. The N1 is generally equal to 0.2 mm. N2 andN4 represent the thickness of the die 204 and the package 200,respectively. N3 is the height of the solder ball 224, and generallyequal to 0.3 mm. The peak point of the wire 214 a is higher than thewire 214 b, as shown in FIG. 4B, so that the distance from the highestpoint 228 of the wire 214 a to the bottom side 211 of the substrate 202represents the maximum vertical distance of the wire, H5, which H5 isgenerally equal to 0.15 mm. The heat sink 206 is encapsulated in theplastic mold 226 and the highest point is located at the topside 230 ofthe plastic mold 226, wherein the height of the heat sink 206 isgenerally equal to 0.2 mm. All of the plastic mold 226, the wire 214 a,the wire 214 b and the solder ball 224 are seated in the bottom side 211of the substrate 202, however, the thickness of the plastic mold 226,0.2 mm, and the height of the wire 214 a, 0.15 mm, are smaller than theheight of the solder ball 224, 0.3 mm. Additionally, the die 204 isencapsulated in the cavity 208 of the substrate 202, so that thethickness of the die, N2, could be considered the same as or smallerthan the thickness of the substrate 202, N1. According to the inventiondescribed above, the overall thickness of the chip package 200, N4, isequal to the sum of Nl and N3. In general, the thickness of thesubstrate 202, N1, is about 0.2 mm while the thickness of the solderball 224, N3, is about 0.3 mm, so the overall thickness of the chippackage 200 in accordance with the invention, N4, is about 0.5 mm thatis thinner than the thickness of the traditional chip package 100 shownin FIG. 1B.

[0032] The process of making the chip package according to the inventionis disclosed. First, referring to FIG. 5, which depicts an upward viewof the chip package and the heat sink according to the invention, theheat sink 206 and the substrate 202 a with the cavity 208 are provided.The heat sink 206 includes the body 215 and a number of the extendingpart 212. The ground ring 210 attaches the bottom side 211 of thesubstrate 202 a. Referring to FIGS. 6A˜6D, which depict the crosssectional view of the process of making the super low profile packagealong the sectional line 6A-6A in FIG. 5. In FIG. 6A, the extendingparts 212 of the heat sink 206 are adhered to the ground ring 210 by theEpoxy 213 in order to fix the heat sink 206 below the cavity 208, andthen the ground layer 227 is formed on the topside 229 of the substrate202 a.

[0033] In FIG. 6B, the die 204 is turned upside down and placed into thecavity 208 of the substrate 202 a. The die 204 is fixed to the bottomside 222 of the heat sink 206 by the adhesive 221, and parts of thefront side of the die 220 is exposed for bonding the wires 214 a and 214b.

[0034] In FIG. 6C, wire bonding is proceeding; the die 204 is connectedto the substrate 202 a via the wires 214 a and 214 b. Next,encapsulating is proceeding; the cavity 208 is filled with the plasticmold 226, and the plastic mold 226 encapsulates the die 204, the heatsink 206, and the wires 204 a and 204 b.

[0035] In FIG. 6D, the solder balls 224 are formed on the substrate 202a. After singulation, the process of making the super low profilepackage according to the invention is complete, and the chip package 200according to the invention is presented in FIG. 4B.

[0036] Furthermore, it is illustrated in the FIG. 4B that the bottomside 231 of the die 204 is not exposed to the atmosphere, and the sizeof the die 204 is smaller than the space of the cavity 208; however, theinvention is not limited herein, people skilled in the art should knowthat the bottom side 231 of the die 204 can be exposed to atmosphere,which the height of the die 204 is equal to the depth of the cavity 208,and the size of the die 204 even can be equal to the space of the cavity208. Referring to FIG. 7, which depicts a diagram of the super lowprofile package while the bottom side 231 of the die 204 is exposed tothe atmosphere, and the super low profile package 300 illustrated inFIG. 7 possesses the better heat dissipation than the traditional chippackage 100 illustrated in FIG. 1B. Additionally, the heat sink 206could not be exposed to the atmosphere. Referring to FIG. 8, whichdepicts a diagram of the super low profile package while the heat sinkis not exposed to the atmosphere, and the super low profile package 400illustrated in FIG. 8 also possesses the better heat dissipation thanthe traditional chip package 100 illustrated in FIG. 1B.

[0037] According to the spirit of the invention, those skilled in theart will recognize that the body 215 of the heat sink 206 is not limitedin the shape, the body 215 can be shaped for circular or grid to supportthe die 204, and the objective of the invention enhancing the efficiencyof heat dissipation is also achieved.

[0038] Referring to FIG. 9, which depicts a side view of the super lowprofile package in FIG. 4B connected to the printed circuit board (PCB)240. In FIG. 9, the chip package 200 is fixed to the PCB 240 by adheringthe solder ball 224 on the bonding pad 242 of the topside 241 of the PCB240; therefore, the chip package 200 is electrically connected to thePCB 240. The plastic mold 226, the solder balls 224, the heat sink 206,the wire 214 a and the wire 214 b are all seated on the bottom side 211of the substrate 202; furthermore, the topside 232 of the heat sink 206is fixed to the surface of the ground layer 245 via the solder 246 sothat heat generated by the die 204 is much easier to dissipate via theheat sink 206 and the ground layer 244 of the PCB 240.

[0039] Additionally, the plastic mold, the solder balls 224, the heatsink 206, the wire 214 a and the wire 214 b are all seated on the bottomside 211 of the substrate 202, so that the overall thickness of thesuper low profile package 200, N4, is about 0.5 mm, which achieves theobjective of providing a super low profile package 200. Moreover,according to the invention, the conventional procedures of taping andde-taping are eliminated from the process of making the super lowprofile package 200, it not only simplify the process but also decreasethe production cost.

[0040] The benefits resulting from the super low profile packageaccording to the invention include the smaller size of the chip package,the simplified process and the lower production cost achieved byeliminating taping and de-taping procedures from the traditionalprocess. Besides, the super low profile package according to theinvention further possesses the higher efficiency of heat dissipation.

[0041] While the invention has been described by ways of example and interms of the preferred embodiment, it is to be understood that theinvention is not limited to the disclosed embodiment. To the contrary,it is intended to cover various modifications and similar arrangementsand procedures, and the scope of the appended claims therefore should beaccorded the broadest interpretation so as to encompass all suchmodifications and similar arrangements and procedures.

What is claimed is:
 1. a super low profile package with high efficiency of heat dissipation, comprising: a substrate having a cavity and a first surface, wherein a plurality of solder balls and a ground ring seated in the first surface of the substrate; a heat sink having a extending part, wherein the extending part of the heat sink adheres to the ground ring; a die having a first surface and seated in the cavity, the first surface of the die adheres to the heat sink; a wire connecting the die and the substrate and bonded on the first surface of the die and the first surface of the substrate; and a plastic mold encapsulating the die, the heat sink and the wire.
 2. The super low profile package according to claim 1, wherein a thickness of the die is equal to a depth of the cavity approximately.
 3. The super low profile package according to claim 1, wherein a thickness of the die is smaller than a depth of the cavity.
 4. The super low profile package according to claim 1, wherein a thickness of the substrate is 0.2 mm approximately.
 5. The super low profile package according to claim 1, wherein a thickness of the heat sink is smaller than the solder balls.
 6. The super low profile package according to claim 5, wherein the thickness of the plastic mold over the first surface of the substrate is thinner than the height of the solder balls.
 7. The super low profile package according to claim 1, wherein the heat sink is exposed to the outside of the plastic mold.
 8. The super low profile package according to claim 7, wherein the super low profile package further connects to a printed circuit board (PCB), and the PCB has a ground layer, and the ground layer connects to the exposed heat sink.
 9. The super low profile package according to claim 1, wherein the extending part of the heat sink adheres to the ground ring by Epoxy.
 10. The super low profile package according to claim 1, wherein the extending part of the heat sink adheres to the ground ring by solder.
 11. The super low profile package according to claim 1, wherein a surface opposite the first surface of the substrate further includes a ground layer for increasing electrical characteristics of the die and decreasing signal interference.
 12. The super low profile package according to claim 11, wherein the ground layer is copper.
 13. The super low profile package according to claim 1, wherein the cavity is filled with the plastic mold.
 14. The super low profile package according to claim 1, wherein a second surface opposite to the first surface of the die is exposed to the atmosphere.
 15. The super low profile package according to claim 1, wherein the heat sink further has a body shaped for rectangular.
 16. The super low profile package according to claim 15, wherein the body is shaped for circular.
 17. A process of making a super low profile package with high efficiency of heat dissipation, comprising steps of: (a) providing a substrate and forming a cavity in the substrate, wherein a bottom side of the substrate includes a ground ring; (b) adhering and fixing an extending part of a heat sink to the ground ring; (c) placing a die into the cavity, and a front surface of the die adhering to the heat sink, wherein a part of the front surface of the die is exposed for bonding a wire; (d) proceeding wire bonding for connecting the wire to the die and the substrate; (e) proceeding encapsulating for forming a plastic mold on the bottom surface of the substrate, wherein the plastic mold encapsulates the die, the heat sink and the wires; (f) forming a plurality of solder balls on the bottom surface of the substrate; and (g) proceeding singulation.
 18. The process of making a super low profile package according to claim 17, wherein the extending part of the heat sink adheres to the ground ring by Epoxy.
 19. The process of making a super low profile package according to claim 17, wherein the extending part of the heat sink adheres to the ground ring by solder.
 20. The process of making a super low profile package according to claim 17, wherein the front surface of the die adheres to the heat sink by an adhesive. 